Embodiments of the present application relate generally to optical networking hardware, and more particularly to a system and method for performing on-chip synchronization of system signals.
High-speed digital communication networks over copper and optical fiber are used in many network communication and digital storage applications. Ethernet and Fiber Channel are two widely used communication protocols, which continue to evolve in response to increasing need for higher bandwidth in digital communication systems. The Open Systems Interconnection (OSI) model (ISO standard) was developed to establish standardization for linking heterogeneous computer and communication systems. It describes the flow of information from a software application of a first computer system to a software application of a second computer system through a network medium.
The OSI model has seven distinct functional layers including Layer 7: an application layer; Layer 6: a presentation layer; Layer 5: a session layer; Layer 4: a transport layer; Layer 3: a network layer; Layer 2: a data link layer; and Layer 1: a physical layer. Importantly, each OSI layer describes certain tasks which are necessary for facilitating the transfer of information through interfacing layers and ultimately through the network. Notwithstanding, the OSI model does not describe any particular implementation of the various layers.
OSI layers 1 to 4 generally handle network control and data transmission and reception. Layers 5 to 7 handle application issues. Specific functions of each layer may vary depending on factors such as protocol and interface requirements or specifications that are necessary for implementation of a particular layer. For example, the Ethernet protocol may provide collision detection and carrier sensing in the physical layer. Layer 1, the physical layer, is responsible for handling all electrical, optical, opto-electrical and mechanical requirements for interfacing to the communication media. Notably, the physical layer may facilitate the transfer of electrical signals representing an information bitstream. The physical layer may also provide services such as, encoding, decoding, synchronization, clock data recovery, and transmission and reception of bit streams. In high bandwidth applications having transmission speeds of the order of Gigabits, high-speed electrical, optical and/or electro-optical transceivers may be used to implement this layer.
As the demand for higher data rates and bandwidth continues to increase, equipment capable of handling transmission rates of the order of 10 Gigabits and higher is being developed for high-speed network applications. Accordingly, there is a need to develop a 10 Gigabit physical layer device that may facilitate such high-speed serial data applications. For example, XENPAK multi-source agreement (MSA) defines a fiber optical module that conforms to the well-known IEEE standard for 10 Gigabit Ethernet (GbE) physical media dependent (PMD) types. In this regard, XENPAK compatible transceivers may be used to implement the physical layer. Notwithstanding, there is a need for transceivers, which are necessary for implementing 10 Gigabit physical layer applications. The well-known IEEE P802.3ae draft 5 specifications describes the physical layer requirements for 10 Gigabit Ethernet applications and is incorporated herein by reference in its entirety.
An optical-based transceiver, for example, may include various functional components which may implement tasks such as clock data recovery, clock multiplication, serialization/de-serialization, encoding/decoding, electrical/optical conversion, descrambling, media access control (MAC), controlling, and data storage.
Many of the different functional components of a transceiver module may employ vastly different and unrelated clock signal frequencies that may not be synchronized. The digital switching caused by the many different clocks may be a potential source of noise that cumulatively, may substantially impair and distort any intermediate or output signals that may be generated by the transceiver module or on-chip system components.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.